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File:Pipeline Data Hazard.svg

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    Description
    English: A table showing a data hazard in the pipelined execution of instructions in a microprocessor. In this case, the instructionas are something like the following:

    SUB r3,r4 -> r10
    AND r10,3 -> r11

    In this case in a naive pipeline, r10 will be used in the EXECUTE step (red) by the AND before the SUB operation performs WRITEBACK on it (green).
    Date
    Source Own work
    Author Inductiveload
    Permission
    (Reusing this file)
    Public domain I, the copyright holder of this work, release this work into the public domain. This applies worldwide.
    In some countries this may not be legally possible; if so:
    I grant anyone the right to use this work for any purpose, without any conditions, unless such conditions are required by law.

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    inception

    22 January 2009

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    Date/TimeThumbnailDimensionsUserComment
    current16:44, 14 February 2013Thumbnail for version as of 16:44, 14 February 2013300 × 190 (6 KB)Ysangkokremove cruft code
    23:42, 22 January 2009Thumbnail for version as of 23:42, 22 January 2009300 × 190 (27 KB)Inductiveload{{Information |Description= |Source= |Date= |Author= |Permission= |other_versions= }}
    23:26, 22 January 2009Thumbnail for version as of 23:26, 22 January 2009300 × 190 (24 KB)Inductiveload{{Information |Description={{en|1=A table showing a data hazard in the pipelined execution of instructions in a microprocessor. In this case, the instructionas are something like the following:<br> SUB r3,r4 -> r10<br> AND r10,3 -> r11 In this case in a n

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